1. Field of the Disclosure
This disclosure relates generally to a distributed weighting network for electrical signals and, more particularly, to a high speed multiplying digital-to-analog-converter (DAC) that employs a distributed weighting network, and to a high speed, high-order wideband quadrature amplitude modulation (QAM) modulator that employs a distributed weighting network and a summing line.
2. Discussion of the Related Art
As is well understood in the art, digital modulators are used to encode data onto a carrier wave for transmission. There are many suitable modulation formats that can be employed for this purpose. One popular modulation format is known as quadrature amplitude modulation (QAM). Low-order special cases include binary phase shift keying (BPSK) and quadrature phase shift keying (QPSK). Higher-order special cases include 8PSK, 16PSK, rectangular 16QAM and 64QAM, and circular 12/4QAM.
For some data links, high-order modulation formats have been achieved at low and moderate modulation rates using DACs to generate baseband or intermediate-frequency (IF) signals, with additional up-conversion to reach the final carrier frequency for transmission. For some other data links, both a high-order modulation format and a fast modulation rate are used to provide large data throughput. Known QAM modulators of this type have sometimes been assembled from multiple monolithic microwave integrated circuits (MMICs). One need in the art is for a high speed, high-order QAM modulator for microwave carrier frequencies that can be fabricated on a single monolithic chip with a small size and low weight and a minimal need for alignment and tuning.